Block Diagram

The RC2014 is split in to distinct functional modules, most of which share some or all of the address, data or control lines (eg MREQ, RD, IORQ).  These signals are all present on the backplane.

Z80 Block Diagram (1)

Shown above is the 5 basic modules that make up the RC2014 (Clock, CPU, RAM, ROM, Serial IO).  Other modules follow a similar layout.  For specific connections see the individual module page.

Note that the position on the backplane is largely irreverent.  I do try to keep the CPU fairly central so the bus lengths are as short as possible, although I have not experienced anything so far that indicates this is necessary on this size of computer.